1. Field of Use
This invention relates generally to scientific instruction processors and more specifically to the truncation of the results of scientific arithmetic operations.
2. Description of the Prior Art
The operands in floating point arithmetic operations include a mantissa, a mantissa sign, and an exponent which locates the decimal point. The mantissa is usually a fractional number that is normalized with the decimal point assumed to the left of the most significant digit of the operand. The most significant digit may be a binary, octal, hexadecimal, etc., digit. The exponent, therefore, is a measure of the number of digit positions to move the decimal point from the left-most position.
During the arithmetic processing of operands, some scientific instructions shift one operand relative to the other. For example, during the processing of a scientific ADD instruction, one operand is shifted in order to equalize the two operands; that is, the exponents are made equal. The length of the result, therefore, is limited only by the length of the scientific accumulators. However, in scientific processing it may not be desirable to store the entire result due to memory limitations. In that case, the mantissa of the result is truncated after normalization. A truncated result may be two words long, four words long, or however long the system requires.
Prior art systems, particularly firmware controlled systems, use a number of firmware steps to generate a truncated result. The steps include generating a mask of binary ONEs and ZEROs, and ANDing the mask with the result of the scientific arithmetic operation. The Honeywell Level 6/40 is a typical example using this approach.
Another technique is to align operands through the use of switches by enabling the portions of the switches associated with the high order bit positions of the result. The switches are controlled by special shifter circuits. Such an approach is described in the system disclosed in U.S. Application Ser. No. 000,391 entitled "Pointer for Defining the Data by Controlling Merge Switches" filed Jan. 2, 1979 and now U.S. Pat. No. 4,224,682.
These approaches, however, have the disadvantage of being too slow or too costly.
It should be understood that the references cited herein are those of which the applicants are aware and are presented to acquaint the reader with the level of skill in the art and may not be the closest reference to the invention. No representation is made that any search has been conducted by the applicants.